PRE-SI FPGA PLATFORM DEVELOPMENT ENGINEER

Job Details.
Job Description.
Your responsibilities will include but not limited to.
Builds emulation and FPGA models and solutions from RTL design using synthesis, partitioning, and routing tools.
Develops, integrates, tests, and debugs hardware and software collateral in simulation, emulation, and FPGA models for testing new features, writes directed tests, develops the test environment and hybrid emulation environment, and supports verification of hardware and software/firmware.
Defines and develops new capabilities and tools to achieve better verification through improved emulation and FPGA model usability.
Enables acceleration of RTL development and improve emulation/FPGA model usability for Pre-Silicon verification, post-silicon validation, and software development.
Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform and interfaces with and provides guidance to verification teams for optimizing Pre-Silicon verification environments, test suites, and methodologies for emulation efficiency.
Develops and utilizes automation aids, flows, and scripts in support of emulation utilization.
Applies understanding of emulation and FPGA prototyping tools and methodologies, SoC integration, emulation transactors, emulation performance and optimization techniques, RTL simulation, and hybrid emulation environments (virtual platform and FPGA/emulation model).
Collaborates with design, power and performance, silicon validation, and software teams, and participates in SoC and IP bring up, root causes testbench issues, IP and SoC testcases, and emulator/FPGA environment issues.
Qualifications.
Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.
Bachelor's degree in Electrical Engineering, Mechatronics, Computer Science or Computer Engineering.
1+ years of experience in.
Digital design.
Combinational, Synchronous (state machines), Asynchronous.
Computer Architecture and interfaces (USB, UART, SPI, I2C, PCIe, etc.).
Hardware Description Languages (Verilog, System Verilog or VHDL).
Programming languages (C, C++, Python, Perl, Java).
FPGA design flow and Linux OS.
Intermediate to Advanced English Level.
Must have unrestricted - permanent right to work in Mexico (this position is not eligible for employment-based visa/immigration sponsorship).
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Master´s degree in Electrical Engineering, Mechatronic, Computer Science or Computer Engineering.
5+ years of experience in software firmware or system level development.
Development and knowledge of UEFI BIOS firmware using Intel architecture.
Experience in debug in Linux, Android and/or Windows environments.
Experience in low level programming system architecture RTL operating systems or device architecture.
Detailed knowledge of IP or subsystem architecture such as Power Management Security or RAS.
Job Type.
Experienced Hire Shift.
Shift 1 (Mexico) Primary Location.
Mexico, Guadalajara Additional Locations.
Business group.
The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices.
The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.
Posting Statement.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
* Job posting details (such as work model, location or time type) are subject to change.
Intel provides reasonable accommodation to applicants and employees.
For more information on our Reasonable Accommodation process, please click here.
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